Self-connected horizontal silicon nanowire field effect transistor

Abstract

We propose a technique to fabricate self-connected horizontal Si nanowire (NW) field effect transistors (FETs) by a self-assembly mechanism. We show direct growth of Si NWs between two predefined metallic electrodes along the SiO 2 gate oxide using the vapour–liquid–solid (VLS) growth mode. In our approach, the gold catalyst layer is covered by the contact metal, giving rise to selective and localized catalytic activity and growth of NWs from the gold edges. The diameter of the NWs can be adjusted by the thickness of the catalyst layer. Using such a process, we demonstrate field effect operation on the conductivity of a non-intentionally doped 20 nm diameter Si NW. This technique can be implemented in three dimensions, paving the way to three-dimensionalD integration using vertical stacks of self-connected FETs.