Self-assembly of reduced Au atoms for vertical interconnections in three dimensional integrated circuits

Abstract

Self-assembled Au atoms were employed to bond vertical interconnection for chip-stacking applications without pressure and at a temperature of 50 °C. In this process, Au ions in an electroless plating solution are forced through a thin gap between Si chips. The Au atoms, reduced from Au ions, self-assemble between pairs of Cu pillars, and void-free connections are achieved with high joint strength. In addition, it has been shown that the Au grains grow epitaxially with the Cu grains. This epitaxial growth offers a potential method to align the Au grains to enhance electrical performance for future high frequency applications.