Self-timing and vector processing in RSFQ digital circuit technology

Abstract

As the operating speed of rapid single flux quantum (RSFQ) integrated circuits and systems increases, timing uncertainty from fabrication process variations makes global synchronization very hard. In this paper, the authors present a globally asynchronous, locally synchronous timing methodology for RSFQ digital design, which can solve the global synchronization problem. They also demonstrate the recent experimental results of some asynchronous circuits and systems implemented in RSFQ technology. Key components such as a self-timed shift register, a self-timed demultiplexor, a Muller-C element, a completion detector, and a clock generator have been designed and tested. High-speed operation has been confirmed up to 20 Gb/s for a prototype data buffer system, which consists of two self-timed shift registers and an on-chip 8-28-GHz clock generator.