Abstract
Nanodevices have terrible properties for building Boolean logic systems: high defect rates,high variability, high death rates, drift, and (for the most part) only two terminals.Economical assembly requires that they be dynamical. We argue that strategies aimed atmitigating these limitations, such as defect avoidance/reconfiguration, or applying codingtheory to circuit design, present severe scalability and reliability challenges. We insteadpropose to mitigate device shortcomings and exploit their dynamical character by buildingself-organizing, self-healing networks that implement massively parallel computations. Thekey idea is to exploit memristive nanodevice behavior to cheaply implement adaptive,recurrent networks, useful for complex pattern recognition problems. Pulse-basedcommunication allows the designer to make trade-offs between power consumption andprocessing speed. Self-organization sidesteps the scalability issues of characterization,compilation and configuration. Network dynamics supplies a graceful response to devicedeath. We present simulation results of such a network—a self-organized spatial filterarray—that demonstrate its performance as a function of defects and device variation.
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