Abstract
This work studies the self-heating (SH) effect in ultra-thin body ultra-thin buried oxide (UTBB) FDSOI MOSFETs at cryogenic temperatures down to 77 K. S-parameter measurements in a wide frequency range, with the so-called RF technique, are employed to assess SH parameters and related variation of analog figures of merit (FoMs) at different temperatures. Contrary to the expectations, the effect of self-heating on analog FoMs is slightly weaker at cryogenic temperatures with respect to room-temperature case. The extracted thermal resistance and channel temperature rise at 300 K and 77 K in short-channel devices are of the same order of magnitude. The observed increase in SH characteristic frequency with temperature reduction emphasizes the advantage of the RF technique for the fair analysis of SH-related features in advanced technologies at cryogenic temperatures.
Highlights
Ultra-thin body and buried oxide (UTBB) fully depleted (FD) silicon on insulator (SOI) technology is widely considered as one of the main contenders for the technology downscaling to 20 nm and beyond [1]–[4]
Self-heating effect in SOI-based technologies at cryogenic temperatures was previously studied in “older technology generations” [17], [18] showing SH intensification both in terms of channel temperature rise, thermal resistance and related parameters degradation at cryogenic temperatures A more recent study [19] analysed self-heating in a wide variety of FDSOI transistors down to 4.2 K using gate resistance technique and showed a strongly non-linear dependence of the channel temperature rise with dissipated power at low temperatures
This paper is an extended version of our work [21], in which the variation of analog FoMs due to self-heating in 28nm FDSOI UTBB CMOS technology is evaluated down
Summary
Ultra-thin body and buried oxide (UTBB) fully depleted (FD) silicon on insulator (SOI) technology is widely considered as one of the main contenders for the technology downscaling to 20 nm and beyond [1]–[4]. Outstanding electrostatic and variability control, excellent performance in terms of lowpower, high-speed, as well as attractive analog and RF figures of merit (FoMs) offered by this technology were demonstrated in numerous publications [1]–[8] This technology was largely investigated at cryogenic temperatures showing promising improvement of device performance [9]–[12]. This paper is an extended version of our work [21], in which the variation of analog FoMs due to self-heating in 28nm FDSOI UTBB CMOS technology is evaluated down. The impact of different sources of uncertainty inherent to the method on the thermal resistance extraction is discussed
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