Abstract
An oversampled modulator design that uses a second-order loop and a three-bit quantizer to exhibit low quantization noise is reported. Second-order loops are attractive because they are unconditionally stable and require only a third-order sinc filter in the decimation filter. Tone energy is significantly reduced in a multibit loop. In addition, a multibit quantizer avoids increased noise generation with input levels near full scale. The modulator uses digital self-calibration of the DAC (digital-to-analog coverter) capacitors to reduce their mismatch. High linearity and low noise are then simultaneously possible when random dynamic capacitor matching is used. The modulator is clocked at 6.144 MHz, and a 0.5-VRMS low-distortion sine wave at 2 kHz is applied at the input. The decimation filtering, with an oversampling ratio of 128-to-1, is performed by an external processor. >
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