Abstract
Currently, commercial semiconductor-based memories face the problem of static energy consumption caused by leakage currents. Magnetoelectric random access memory (MeRAM), as a type of nonvolatile memory, provides a solution to this problem and can be used to replace the entire memory hierarchy as a universal memory. In contrast to spin transfer torque RAM (STT-RAM), MeRAM uses voltage controlled magnetic anisotropy (VCMA) effect to manipulate the switching of magnetic tunnel junctions (MTJs). MeRAM or VCMA-MTJ technology is more energy efficient and less likely to break down than STT-RAM. However, VCMA-MTJ suffers from serious write problems caused by variations in the VCMA coefficient, the external in-plane magnetic field, and the CMOS process. In this paper, a compact and SPICE-compatible VCMA-MTJ model is proposed. Then, a self-adaptive write circuit is proposed in which the write process is robust to variations in the VCMA coefficient and the external in-plane magnetic field. Finally, two practical methods are proposed to make our proposed self-adaptive write circuit also robust to 3 $\sigma$ CMOS process variations, as demonstrated by Monte Carlo simulations. The proposed self-adaptive write circuit can assist in the design of next-generation high-speed, low-power MeRAM chips.
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