Selective plating concept for silicon heterojunction solar cell metallization

Abstract

We introduce a new plated metallization process for Silicon Heterojunction (SHJ) solar cells by selective plating of copper onto a positively masking seed layer. This process tackles the issues of high silver consumption and low grid conductivity of screen printed contacts on SHJ solar cells. Compared to other metallization approaches of plating into a negative mask, our process does not require expensive process steps or consumables to plate and then remove the mask. The process involves the deposition of a full area PVD layer of a valve metal like Al or Ti onto the ITO surface of a SHJ solar cell. The valve metal layer is self-passivating in nature and provides the ideal mix of conductivity for plating current distribution and selectivity for copper plating. As the next step, the grid is locally defined by printing or laser transferring the seed layer. Now a pulsed Cu plating step is applied to plate on the seed layer selectively while the valve metal layer is partly oxidized and parasitic Cu deposition on the valve metal surface is dissolved during reverse pulses. The valve metal layer is finally etched off in a subsequent etch bath.