Selective Epitaxial Growth of In Situ Doped SiGe on Bulk Ge for p+/n Junction Formation

Konstantinos Garidis,Ali Asadollahi,Ahmad Abedin,Mikael Östling,Per-Erik Hellström

doi:10.3390/electronics9040578

Abstract

Epitaxial in situ doped Si0.73Ge0.27 alloys were grown selectively on patterned bulk Ge and bulk Si wafers. Si0.73Ge0.27 layers with a surface roughness of less than 3 nm were demonstrated. Selectively grown p+Si0.73Ge0.27 layers exhibited a resistivity of 3.5 mΩcm at a dopant concentration of 2.5 × 1019 boron atoms/cm3. P+/n diodes were fabricated by selectively growing p+- Si0.73Ge0.27 on n-doped bulk Ge and n-doped Si wafers, respectively. The geometrical leakage current contribution shifts from the perimeter to the bulk as the diode sizes increase. Extracted near midgap activation energies are similar to p+/n Ge junctions formed by ion implantation. This indicates that the reverse leakage current in p+/n Ge diodes fabricated with various doping methods, could originate from the same trap-assisted mechanism. Working p+/n diodes on Ge bulk substrates displayed a reverse current density as low as 2.2·10−2 A/cm2 which was found to be comparable to other literature data. The layers developed in this work can be used as an alternative method to form p+/n junctions on Ge substrates, showing comparable junction leakage results to ion implantation approaches.

Highlights

Ge based field effect transistor (FET) devices are researched due to their potential for low voltage operation stemming from the superior hole and electron mobility in Ge as compared to Si
Junctions on bulk Ge have been traditionally formed with ion implantation and a subsequent anneal
Our work shows similar levels of leakage current density as in the ion implantation junction studies

Summary

Introduction

Ge based field effect transistor (FET) devices are researched due to their potential for low voltage operation stemming from the superior hole and electron mobility in Ge as compared to Si. Selective epitaxy of in situ doped SiGe is an implantation-free and temperature-flexible process. It has the potential to address the challenges outlined above. The authors show a three-fold improvement in the device current at the ON state (ION ), achieved with 25% Ge in the SiGe stressor This work2020, investigates the feasibility of selectively grown, in situ doped p+ -Si0.73 Ge0.27 as Electronics. The+ layers can potentially be presented here by the epitaxial growth temperature This was workset investigates the feasibility of selectively grown,of in 650 situ doped p -Si0.73Ge0.27 layers as a source/drain junction material. Planar p+/n substrates diodes wereand fabricated on SiO2 patterned, bulk n-Ge integrated in germanium-on-insulator (GOI).

Results and Discussion

Dopant concentration

Electrical Characterization and Analysis

Arrhenius leakage current current IΙRR versus for 10

Conclusions