Selective dry-etching process for fabricating Ge gate-all-around field-effect transistors on Si substrates

Abstract

A process for removing defective Ge layers near Ge/Si interface during active region definition, thus allowing for nearly defect-free Ge channels, was investigated. By adjusting the HBr/Cl2 plasma ratio and bias power, different fin-like field-effect transistor structures can be fabricated. This process allowed for better gate control than conventional rectangular fins due to the gate-all-around (GAA) fin structures fabricated using the process. Additionally, because the effective fin width of triangular fins is larger than conventional rectangular fins, the triangular GAA field effect transistors also have a higher current density. This technique can be used to obtain suspended structures from epitaxial Ge layers grown over Si substrates, as well as other alloy semiconductors, for an integration device.