Abstract
Very Long Instruction Word, or VLIW, architectures have received much attention in specific-purpose applications such as scientific computation, digital signal processing, and even safety-critical systems. Several compilation techniques for VLIW architectures have been proposed in order to improve the performance, but there is a lack of research to improve reliability against soft errors. Instruction duplication techniques have been proposed by exploiting unused instruction slots (i.e., NOPs) in VLIW architectures. All the instructions cannot be replicated without additional code lines. Additional code lines are required to increase the number of duplicated instructions in VLIW architectures. Our experimental results show that 52% performance overhead as compared to unprotected source code when we duplicate all the instructions. This considerable performance overhead can be inapplicable for resource-constrained embedded systems so that we can limit the number of additional NOP instructions for selective protection. However, the previous static scheme duplicates instructions just in sequential order. In this work, we propose packing-oriented duplication to maximize the number of duplicated instructions within the same peroformance overhead bounds. Our packing-oriented approach can duplicate up to 18% more instructions within the same performance overheads compared to the previous static duplication techniques.
Highlights
With technological advances, soft errors are becoming increasingly critical concerns in computing systems at the early design phase, especially in modern-embedded systems [1,2] and safety-critical systems such as aerospace computing [3,4]
Very Long Instruction Word (VLIW) architectures are deployed in the many modern-embedded systems in order to improve performance, and they are exploited for safety-critical applications such as healthcare and automotive systems
As the reliability of embedded systems against soft errors is becoming more critical with technology scaling, several techniques have been proposed to protect VLIW architectures
Summary
Soft errors are becoming increasingly critical concerns in computing systems at the early design phase, especially in modern-embedded systems [1,2] and safety-critical systems such as aerospace computing [3,4]. Soft errors are transient bit flips in semiconductor devices caused by electrical noise, external electronic interferences, cross-talk, alpha particles, neutron, cosmic ray, etc. The soft error rate is exponentially increasing as the critical charge decreases. Critical charge, which is the minimum charge causing soft errors, and soft error rate have an inversely exponential relationship. Critical charges are decreasing due to a shrinking feature chip size and decreasing supply voltage [6]. The reliability of embedded systems against soft errors is threatened due to the small form factor intensive low-power computing [7]
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