Selective area growth of III–V nanowires and their heterostructures on silicon in a nanotube template: towards monolithic integration of nano-devices

Abstract

We demonstrate a catalyst-free growth technique to directly integrate III–V semiconducting nanowires on silicon using selective area epitaxy within a nanotube template. The nanotube template is selectively filled by homo- as well as heteroepitaxial growth of nanowires with the morphology entirely defined by the template geometry. To demonstrate the method single-crystalline InAs wires on Si as well as InAs–InSb axial heterostructure nanowires are grown within the template. The achieved heterointerface is very sharp and confined within 5–6 atomic planes which constitutes a primary advantage of this technique. Compared to metal-catalyzed or self-catalyzed nanowire growth processes, the nanotube template approach does not suffer from the often observed intermixing of (hetero-) interfaces and non-intentional core–shell formation. The sequential deposition of different material layers within a nanotube template can therefore serve as a general monolithic integration path for III–V based electronic and optoelectronic devices on silicon.