Abstract

Selectively growing epitaxial material in confined dielectric structures has been explored recently as a pathway to integrate highly mismatched materials on silicon substrates. This approach involves the fabrication of a channel-like structure of dielectric material that from the growth atmosphere reaches down to a small exposed area of the substrate where subsequent growth via metal organic chemical vapor deposition (MOCVD) initiates. The technique, referred to as template assisted selective epitaxy, can also enable the development of novel nanoscale photonic and electronic device structures because of its ability to allow epitaxy to progress in a direction, final size, and aspect ratio defined by the dielectric template, and allows integration of horizontal heterojunction inside the channel. To date, most confined epitaxy work has been detailed on silicon. Due to the reduced chemical and thermal stability of InP compared to Si, additional steps for surface preparation are required. In this work, two different fabrication routes are described on InP substrates: one involving amorphous silicon as a sacrificial layer and deposited SiO2 as top oxide, while the other involves spin coated photoresist and hydrogen-silsesquioxane sourced SiOx. Both routes, leading to similar template structures, are demonstrated and discussed. Homoepitaxy of InP in both types of templates and the integration of an InAs horizontal heterojunction are demonstrated via MOCVD. An increase in growth rate with decreasing template length, increasing template width, and decreasing pattern density is observed.

Highlights

  • There has been interest in template assisted selective epitaxy (TASE) as a technique to integrate highly lattice-mismatched materials

  • The technique, referred to as template assisted selective epitaxy, can enable the development of novel nanoscale photonic and electronic device structures because of its ability to allow epitaxy to progress in a direction, final size, and aspect ratio defined by the dielectric template, and allows integration of horizontal heterojunction inside the channel

  • TASE is a type of selective area growth (SAG) that involves epitaxial growth of semiconductor materials within a confined structure that is formed with patterned dielectric materials

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Summary

Introduction

There has been interest in template assisted selective epitaxy (TASE) as a technique to integrate highly lattice-mismatched materials. TASE is a type of selective area growth (SAG) that involves epitaxial growth of semiconductor materials within a confined structure that is formed with patterned dielectric materials.. Gas phase precursors enter the confined structure through a “source hole” and are exposed to an area of the semiconductor substrate, referred to as a “seed,” where growth selectively initiates. IBM Research has demonstrated the integration of group III-V materials on silicon with TASE, sometimes referred to as confined epitaxial lateral overgrowth (CELO).. Limited studies regarding growth dynamics and template effects for TASE on Si have been published.. Additional work has leveraged TASE for defect trapping to grow GaN and has explored effects on a submicrometer scale using templates with a cavity thickness

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