Abstract

Introduction This paper presents a critical analysis of the signal processing flow carried out in a software GPS receiver and a critical comparison of different architectures for signal processing within the GPS receiver. A model of software receivers is shown. Based on the displayed model, a receiver has been realized in the MATLAB software package, in which the simulations of signal processing were carried out. The aim of this paper is to demonstrate the advantages and disadvantages of different methods of the synchronization of signals in the receiver, and to propose a solution acceptable for possible implementation. The signal processing flow was observed from the input circuit to the extraction of the bits of the navigation message. The entire signal processing was performed on the L1 signal and the data collected by the input circuit SE4110. A radio signal from the satellite was accepted with the input circuit, filtered and translated into a digital form. The input circuit ends with the hardware of the receiver. A digital signal from the input circuit is brought into the PC Pentium 4 (AMD 3000 +) where the receiver is realized in Matlab. Model of software GPS receiver The first level of processing is signal acquisition. Signal acquisition was realized using the cyclic convolution. The acquisition process was carried out by measuring signals from satellites, and these parameters are passed to the next level of processing. The next level was done by monitoring the synchronization signal and extracting the navigation message bits. On the basis of the detection of the navigation message the receiver calculates the position of a satellite and then, based on the position of the satellite, its own position. Tracking of GPS signal synchronization In order to select the most acceptable method of signal synchronization in the receiver, different methods of signal synchronization are compared. The early-late-DLL (Delay Lock Loop), TDL (Tau Dither Loop) and Costas's PLL (Phase Lock Loop) models of loop tracking of signal synchronization are presented. The analysis is performed by processing the signals from the same satellite and under the same conditions of the initial signal synchronization. The multiple signal processing showed the advantages and disadvantages of the particular methods and the most acceptable solution proved to be the implementation of the DLL tracking loop phase synchronization and the code tracking loop PLL carrier frequency synchronization. The influence of the parameters of the loop itself is shown as well. After the extraction of navigation bits, all bit extracts do not come with an equal phase. This may lead to a wrong decision in rejecting the Decider and bits. Therefore, the paper proposes an additional synchronization of the extracted bits selected by the navigation messages NDA (Non-Data-Aided) algorithm in order to perform their correct detection and to position the receiver much faster. Comparison of methods of signal synchronization Based on the analysis of the methods, the simulation results are compared. The results showed that the TDL loop is not resistant to dynamic disturbances of signals, since the synchronization tracking breaks up. In addition, this loop shows susceptibility to the noise from free space. These are sufficient reasons to propose the implementation of the DLL signal tracking loop as an acceptable solution. In addition to the proposal of the tracking loop, tracking loop coefficient values are determined. Conclusion The performed analysis showed that the TDL loop is not resistant to noise and dynamic disorders of the input signal. Therefore, an appropriate solution for the implementation is the DLL loop with six correlates. The DLL tracking loop coefficients are determined as a compromise solution and they are B = 2Hz and γ = 0.7. Also, the coefficients of the PLL tracking loop of frequency synchronization are B = 20Hz and γ = 0.7. The application of the NDA algorithm results in an additional synchronization of the navigation bit message, thus making the receiver operate faster and more precisely.

Highlights

  • Sažetak: U radu su prikazani kritička analiza toka obrade signala u softverski realizovanom GPS prijemniku i kritičko poređenje različitih arhitektura za obradu signala u okviru GPS prijemnika

  • Prvi blok realizuje se fizički i služi za prihvat signala sa satelita, filtriranje, spuštanje signala na MF i konverziju u digitalni oblik

  • Inicijalizacija petlji praćenja sinhronizacije koda i signala nosioca započinje na osnovu podataka iz bloka akvizicije

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Summary

IZBOR METODA SINHRONIZACIJE SIGNALA U SOFTVERSKOM GPS PRIJEMNIKU

Sažetak: U radu su prikazani kritička analiza toka obrade signala u softverski realizovanom GPS prijemniku i kritičko poređenje različitih arhitektura za obradu signala u okviru GPS prijemnika. Na osnovu izvršene analize i prikupljenih podataka, predložen je najprihvatljiviji metod praćenja signala za implementaciju u softverskom GPS prijemniku. V. i dr., Izbor metoda sinhronizacije signala u softverskom GPS prijemniku, str. Obrada signala u okviru SDR realizuje se pomoću programabilnih DSP (Digital Signal Processing) ili FPGA (Field Programmable Gate Array) kola, što omogućava jednostavnu promenu algoritama digitalne obrade signala i jednostavnu promenu parametara prijemnika. Na osnovu analize različitih metoda praćenja sinhronizacije, dobijeni rezultata su poređeni a predložen je i najprihvatljiviji metod za implementaciju u softverskom GPS prijemniku. Softverski GPS prijemnik, korišćen u ovom radu, realizovan je primenom programskog paketa MATLAB, u kome je i simuliran tok obrade signala. Signal sa satelita primljen je pomoću ulaznog kola SE4110, sa baferom veličine 600 Mb

Model softverskog GPS prijemnika
Proračun pozicije
Osnovne karakteristike GPS signala
Akvizicija GPS signala
Praćenje sinhronizacije GPS signala
Sinhronizacija signala nosioca pomoću PLL petlje
Qk Ik
Poređenje metoda sinhronizacije signala
Kanal PRN
Podešavanje parametara DLL petlje praćenja
Full Text
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