Abstract
Radiation effects can induce severe and diverse soft errors in digital circuits and systems. A Xilinx commercial 16 nm FinFET static random-access memory (SRAM)-based field-programmable gate array (FPGA) was selected to evaluate the radiation sensitivity and promote the space application of FinFET ultra large-scale integrated circuits (ULSI). Picosecond pulsed laser and high energy heavy ions were employed for irradiation. Before the tests, SRAM-based configure RAMs (CRAMs) were initialized and configured. The 100% embedded block RAMs (BRAMs) were utilized based on the Vivado implementation of the compiled hardware description language. No hard error was observed in both the laser and heavy-ion test. The thresholds for laser-induced single event upset (SEU) were ~3.5 nJ, and the SEU cross-sections were correlated positively to the laser’s energy. Multi-bit upsets were measured in heavy-ion and high-energy laser irradiation. Moreover, latch-up and functional interrupt phenomena were common, especially in the heavy-ion tests. The single event effect results for the 16 nm FinFET process were significant, and some radiation tolerance strategies were required in a radiation environment.
Highlights
Given its high processing power and configuration flexibility, static random-access memory (SRAM)-based field-programmable gate array (FPGA) has become one of the most fascinating devices in astrionics [1,2,3]
High energy 181 Ta ions were used with the initial linear energy transfer (LET) value at 80.5 MeV·cm2 ·mg−1
The full-1 data were written in the block RAMs (BRAMs) module
Summary
Given its high processing power and configuration flexibility, static random-access memory (SRAM)-based field-programmable gate array (FPGA) has become one of the most fascinating devices in astrionics [1,2,3]. Particle-induced single event effects (SEE) in SRAM-FPGA have shown diversity and complexity in previous studies. This was because the basic SRAM architectures were sensitive to single event upset (SEU), single event latch-up (SEL), and single event functional interrupt (SEFI). Though SEU is not so destructive as SEL, the occurrence of upset errors in FPGA configure RAMs (CRAMs) may change the internal states of the circuits. This may propagate to the primary outputs of circuits and produce bit errors, or even cause system failures [3,4,5,6,7].
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