Security through obscurity: An approach for protecting Register Transfer Level hardware IP

Abstract

Modern system-on-chip (SoC) designs rely heavily on reusable, verified and bug-free hardware intellectual property (IP) cores. Recent trends of IP piracy and reverse-engineering are causing major revenue loss to the IP vendors. A large majority of hardware IPs comes in register transfer level (RTL) description due to their portability and flexibility to map to any technology platform. In this paper, we propose a key-based security through obscurity approach for protecting RTL hardware IPs. The RTL design is first transformed into a technology-independent gate-level description and the functionality of the resulting gate-level netlist is then changed through modification of its state transition function. This process allows normal operation only on the successful application of a correct initialization sequence. The modified gate-level design is then decompiled to generate an obfuscated version of the RTL. Major RTL constructs and macros are optionally preserved through the transformation process using a forward annotation file. The proposed methodology differs from existing hardware obfuscation as well as watermarking techniques in its ability to achieve simultaneous functional and semantic obfuscation for RTL description of IP at low design overhead. Simulation results for a set of open-source IP cores show that we can achieve high levels of security through a well-formulated obfuscation scheme incurring nominal area, delay and power overhead.