Abstract

Cybersecurity is a critical issue for Real-Time IoT applications since high performance and low latencies are required, along with security requirements to protect the large number of attack surfaces to which IoT devices are exposed. Elliptic Curve Cryptography (ECC) is largely adopted in an IoT context to provide security services such as key-exchange and digital signature. For Real-Time IoT applications, hardware acceleration for ECC-based algorithms can be mandatory to meet low-latency and low-power/energy requirements. In this paper, we propose a fast and configurable hardware accelerator for NIST P-256/-521 elliptic curves, developed in the context of the European Processor Initiative. The proposed architecture supports the most used cryptography schemes based on ECC such as Elliptic Curve Digital Signature Algorithm (ECDSA), Elliptic Curve Integrated Encryption Scheme (ECIES), Elliptic Curve Diffie-Hellman (ECDH) and Elliptic Curve Menezes-Qu-Vanstone (ECMQV). A modified version of Double-And-Add-Always algorithm for Point Multiplication has been proposed, which allows the execution of Point Addition and Doubling operations concurrently and implements countermeasures against power and timing attacks. A simulated approach to extract power traces has been used to assess the effectiveness of the proposed algorithm compared to classical algorithms for Point Multiplication. A constant-time version of the Shamir’s Trick has been adopted to speed-up the Double-Point Multiplication and modular inversion is executed using Fermat’s Little Theorem, reusing the internal modular multipliers. The accelerator has been verified on a Xilinx ZCU106 development board and synthesized on both 45 nm and 7 nm Standard-Cell technologies.

Highlights

  • Nowadays the request for secure communication over a network is growing dramatically

  • We focused on protecting our Elliptic Curve Cryptography (ECC)-system against both timing and SPA attacks

  • In order to make a fair comparison with previous works, in this paper we present a comparison among our synthesis results on 45 nm and other ECC systems synthesized on ASIC technologies from 55 nm to 130 nm

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Summary

Introduction

Nowadays the request for secure communication over a network is growing dramatically. Different areas such as automotive, Internet of Things (IoT), health-care, storage and financial services require the exchange of sensitive information on insecure channels. Symmetric and asymmetric cryptography can provide several security services as authentication, key exchange, digital signature and data encryption, ensuring the protection of data exchanged. Elliptic Curve Cryptography (ECC) is a kind of asymmetric cryptography, which provides the advantage of obtaining an equivalent security level key size that is smaller in respect to other public key algorithms, such as Rivest-Shamir-Adleman (RSA) [1]. The main operation involved in every cryptography scheme based on ECC is the Point ECC was introduced by Victor Miller [4] and Neil Koblitz [5] in 1985 and has been adopted by many standardization institutes such as IEEE [6], NIST [7], ANSI [8] and SECG [9].

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