Abstract
This paper presents a sector subdivision based space vector pulse width modulation (SVPWM) strategy with reduced current ripple for a three-level inverter. Using the output current ripple theory, closed-form expressions of average current ripple vectors for both continuous and discontinuous switching sequences are derived. Based on the sector and triangle distributions of conventional SVPWM strategy, each triangle is further divided into three small-regions. Then the switching sequence with the lowest magnitude of the average current ripple vector is applied in every small-region, so that the advantages of continuous pulse width modulation (CPWM) and discontinuous pulse width modulation (DPWM) under different modulation index conditions are combined to reduce the current ripple in the whole modulation range. The output performance of the proposed strategy is compared with the conventional CPWM and DPWM strategy, and experimental results verify that the proposed strategy could reduce the current ripple of three-level inverters effectively.
Highlights
Three-level inverters are possible to generate five-level-step-shaped line to line voltage and three-level-step-shaped phase voltage
The topology of three-level inverters can be divided into three categories: cascade H-bridge (CHB) [4], flying capacitor (FC) [5], and neutral-point-clamped (NPC) [6]
The research of three-level inverter has been focused on output current ripple reduction [10], neutral-point potential fluctuation restraint [8,11,12], common mode voltage reduction [13], switching loss suppression [14], and low switching frequency operation [15]
Summary
Three-level inverters are possible to generate five-level-step-shaped line to line voltage and three-level-step-shaped phase voltage. The research of three-level inverter has been focused on output current ripple reduction [10], neutral-point potential fluctuation restraint [8,11,12], common mode voltage reduction [13], switching loss suppression [14], and low switching frequency operation [15]. With these strategies, basic vectors used to synthesize the reference vector or dwell times of redundant switching states are changed to meet the requirement of a certain aspect of performance. A sector subdivision based SVPWM strategy with a reduced current ripple can be obtained
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