Abstract

Data prefetching, which issues data fetch requests prior to actual use, is an effective technique to reduce the effects of memory access latency. In this paper, we propose an implementation of tagged data prefetching that needs no cache modification and fairly simple hardware. Using a program driven simulation of scientific applications in the context of shared-memory multiprocessors, it is shown that the proposed method can result in performance equal to or better than that of conventional tagged prefetching.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.