Abstract
The recent rapid growth in demand for highly reliable digital circuits has focused attention on tools and techniques we might use to accurately estimate the reliability of a proposed circuit on the basis of failure rate of the utilized technology. Reliability analysis has become an integral part of the system design process, especially for those systems with life-critical applications such as aircrafts and spacecraft flight control. In this paper, we present an algorithm to evaluate the reliability of sequential circuits. This approach called ‘multiple-pass’ combines gate failure probability with the propagated errors to calculate the reliability of every nodes of the circuit in an iterative manner. The proposed approach is used to implement and develop the SCRAP program. It computes the reliability of the sequential circuit based on its standard cell library which can be extended to have larger gates such as D flip-flops. The framework is applied to a subset of sequential benchmark circuits and the observed results demonstrate the accuracy and speed of the proposed technique.
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