Scheduling in a continuous area-time design space

Abstract

Operation scheduling and hardware allocation are the two most important phases in the synthesis of circuits from behavioral descriptions. This paper presents CYOS (CYcle time Optimizer and Scheduler), a new approach to the scheduling of operations in data-path synthesis. The main contribution consists in confronting the problem in its broadest sense, exploring both time and space as continuous variables of the design space. Cycle time is also one of the variables explored and optimized by CYOS. A Simulated Annealing based algorithm has been chosen to search through the area-time design space.