Scanning tunneling microscopy on ultrathin silicon on insulator (100)

Abstract

(100)-oriented ultrathin silicon-on-insulator (SOI) with Si template thickness at or below 10nm, normally fully depleted due to carrier trapping in surface states, can be made conducting by terminating the surface with monolayer amounts of Ge. With this modification, which preserves the morphology of the surface, imaging with atomic resolution by scanning tunneling microscopy (STM) becomes possible. STM imaging is used to demonstrate surface smoothing by a thin (few monolayers) Si buffer at high temperature. Tunneling spectroscopy shows a high sheet resistance of the SOI sample, caused by a partial dewetting of the oxide supported Si template during thermal surface cleaning. High-resolution imaging and spectroscopy by STM will enable studies, at the atomic scale, of technologically relevant processes on ultrathin SOI.