Scaling the 3D Bumps Pitch from 20 to 10 μm, Focusing on the Wet Cu Seed Etch Process Development

Abstract

Within 3D stacked integrated circuits (3D-SIC), the fabrication of well-defined and solid microbumps is required. These bumps are typically being processed in presence of probing metal such as Al in order to stack functioning dies [1]. As a result of the variety of metals present and the continuous microbump downscaling towards 10 μm, more selective Cu seed etch chemistries are being screened. These Cu seed etch chemistries should be compatible with a variety of metals (Ni, Sn, Al, Co) and generate bumps without undercut and acceptable lateral etch (< 300 nm/side for 20 μm and < 150 nm/side for 10 μm). However the lateral etch specifications were just met for 20 μm [2] and will be more stringent for 10 μm, especially as the lateral etch specification are within the same range as the Cu seed layer thickness (150 nm). Additionally, the current seed etch process is yielding rough bumps (Rs >15 nm) whereas our target is set to be <12 nm in order to guarantee a good electrical contact.