Scaling of Statistical and Physical Electromigration Characteristics in Cu Interconnects

Abstract

AbstractEven after the successful introduction of Cu-based metallization, the electromigration (EM) failure risk has remained one of the important reliability concerns for most advanced process technologies. Ever increasing operating current densities and the introduction of low-k materials in the backend process scheme are some of the issues that threaten reliable, long-term operation at elevated temperatures. The main factors requiring attention and careful control are the activation energy related to the dominating diffusion mechanism, the resulting median lifetimes, and the lognormal standard deviation of experimentally acquired failure time distributions. Whereas the origin of the EM activation energy and the behavior of median lifetimes with continuing device scaling are relatively well understood, detailed models explaining the origin and scaling behavior of the lognormal standard deviation are scarce. The statistical behavior of EM-induced void sizes and resulting lifetime distributions appear to be explainable by geometrical variations of the void shapes and the consideration of kinetic aspects of the EM process. Using these models, expected lifetime distributions for future technology nodes can be simulated from current, experimentally obtained void size and lifetime distributions. These simulations have to include geometrical factors of the EM test structures and actual, on-chip interconnects, as well as kinetic aspects of the mass transport process, such as differences in interface diffusivity between the lines. By extrapolating the expected lifetime distributions for future technology nodes from current EM data, it is possible to predict when insertion of new process schemes, such as Cu-alloys and/or metallic coating of the Cu/passivation interface is required.