Scaling challenge of Self-Aligned STI cell (SA-STI cell) for NAND flash memories

Abstract

This paper describes scaling limitations and challenges of Self-Aligned STI cell (SA-STI cell) over 2X–0Xnm generations for NAND flash memories. The scaling challenges are categorized to (1) narrow Read Window Margin (RWM) problem, (2) structural challenge, and (3) high field (5–10MV/cm) problem. First, (1) the narrow RWM is investigated by extrapolating physical phenomena of FG–FG coupling interference, Electron Injection Spread (EIS), Back Pattern Dependence (BPD), and Random Telegraph Noise (RTN). The RWM is degraded not only by increasing programmed Vt distribution width, but also by increasing Vt of erase state mainly due to large FG–FG coupling interference. However, RWM is still positive in 1Znm (10nm) generation with 60% reduction of FG–FG coupling by air-gap process. For (2) structural challenge, the Control Gate (CG) fabrication margin between Floating Gates (FGs) is becoming much severer beyond 1Xnm generation. Very narrow 5nm FG width/space has to be controlled. For (3) high field problem, high field between CGs (word lines; WLs) is critical during program. By using WL air-gap, high field problem can be mitigated, and 1Y/1Znm generation seems to be realized. Therefore, the SA-STI cell is expected to be able to scale down to 1Znm (10nm) generation, with the air gap of 60% reduced FG–FG coupling interference and an accurate control of FG/CG formation process.