Scalable Spatial Notch Suppression in Spatio-Spectral-Filtering MIMO Receiver Arrays for Digital Beamforming

Abstract

Large-scale multiple-input-multiple-output(MIMO) technology is drawing significant interest for the next-generation wireless networks. Traditional MIMO receiver architectures use multiple parallel receiver front ends with digitization at every element to support digital space-time array processing. The absence of analog/RF spatial interference mitigation in traditional digital MIMO receiver arrays results in a high dynamic-range requirement, and consequently, power-hungry analog and RF receiver front ends and analog-to-digital converters. This paper presents a scalable 65 nm CMOS 0.1–1.7 GHz spatio-spectral-filtering four-element MIMO receiver array with spatial notch suppression that protects the analog/RF circuits and analog-to-digital converters from spatial interference early in the signal chain. The combination of spatial and spectral filtering results in more than 19 dB rejection irrespective of the frequency at which the spatial blocker is located. The proposed spatial notch suppression technique improves the measured in-band OIP3 from –10 to +24 dBV, and the measured out-of-band IIP3 from +11 to +18 dBm. Furthermore, turning on the spatial notch suppression leads to minimal noise figure degradation. The proposed chip architecture is scalable on board without the need for RF interconnections. A wireless imaging demo shows two of the implemented integrated circuits tiled on board to form an eight-element MIMO receiver array that is able to detect a weak desired signal in the presence of an in-band 15 dB stronger spatial blocker.