Scalable Modeling and Measurement of TSV Applied for Efficiency Improvement of a RF PA

Abstract

A high efficient CMOS class-E power amplifier (PA) by using Quad Flat No-leads (QFN) package combined with Through Silicon Via (TSV) grounding is presented. TSV has much smaller parasitic inductance and resistance than wire-bonds. TSV technology can improve PA efficiency, reduce die size samples and retain low cost in QFN package. The TSV samples are made and measured by using double-side probing technique with a novel calibration method. TSV scalable model is established with good correlation comparing to RF measurement results. Apply the TSV scalable model in the CMOS PA simulation circuit. The simulation results show that TSV delivers obvious reduction in inductance compared to traditional wire-bond and improvement for Power Added Efficiency (PAE).