Scalable in-memory mapping of Boolean functions in memristive crossbar array using simulated annealing

Abstract

Abstract Memristor is a two-terminal device that can be used to store data and/or implement logic functions in crossbar array. Memristor supports in-memory computing where storage and computation can be done in the same crossbar array. In-memory computing is an attractive approach especially with Resistive RAM (ReRAM) devices like memristors that provide high scalability and non-volatility. In this paper, a technique to implement logic functions in memristor crossbar array has been proposed. The logic functions are translated into NOT/NOR netlist and then mapped to the crossbar array. Further, we have used the simulated annealing algorithm to optimize latency, area, and energy. Simulation studies have been performed under Cadence Virtuoso environment to estimate the switching delay and energy consumption of MAGIC NOR gates. Experimental evaluation is carried out on ISCAS-85 benchmarks and compared with an existing in-memory synthesis approach. The proposed work is found to execute faster and utilize less area in a much squarer and compact crossbar. The energy dissipation is 85.65% less when compared with IMPLY based synthesis.