Scalable architecture for sub-pJ/b multi-Tbps comb-driven DWDM silicon photonic transceiver

Abstract

The explosive growth of data-centric artificial intelligence applications calls for the next generation of optical interconnects for future hyperscale data centers and high-performance computing (HPC) systems. To unleash the full potential of dense wavelength-division multiplexing, we present the design and exploration of a novel transceiver architecture based on silicon photonic micro-resonators featuring a broadband Kerr frequency comb source and fabrication-robust (de-)interleaving structures. In contrast to the traditional single-bus architecture, our architecture de-interleaves the comb onto multiple buses before traversing separate banks of cascaded resonant modulators/filters, effectively doubling the channel spacing with each stage of de-interleaving. With a closed-form free spectral range (FSR) engineering technique guiding the micro-resonator design, the architecture is scalable toward hundreds of parallel channels—spanning much wider than the resonator FSRs—with minimal crosstalk penalty and thermal tuning overhead. This unique architecture, designed with co-packageability in mind, thus enables a multi-Tbps aggregated data rate with moderate per-channel data rates, paving the way for sub-pJ/b ultra-high-bandwidth chip-to-chip connectivity in future data centers and HPC systems.