Scalability and reliability issues of Ti/HfOx-based 1T1R bipolar RRAM: Occurrence, mitigation, and solution

Abstract

Scalability and reliability issues are the most dominant obstacle for the development of resistive switching memory (RRAM) technology. Owing to the excellent memory performance and process compatibility with current CMOS technology of Ti/HfOx-based filamentary type bipolar RRAM, its scalability and reliability issues have been investigated in this document. Towards this goal, we demonstrate that there exists a clear correlation between the transistor and memory cell, which ultimately limits the scaling in terms of operation current and size of the transistor as well and performance of the Ti/HfOx-based 1T1R bipolar RRAM. Due to the resemblance of switching behaviour between complementary resistive switching, i.e., CRS in a single memory stack, and bipolar resistive switching, the Ti/HfOx-based bipolar RRAM suffers from resistance pinning (RP) issues, whereas the minimum resistance during the 1st RESET operation always impeded below 20 kΩ; this occurs through the interaction between the transistor and memory cell during the FORMING process. However, a sufficiently lower FORMING voltage can mitigate the RP issue occurring in Ti/HfOx-based bipolar RRAM and an alternative Ta buffer layer over HfOx dielectrics is proposed to prevent the activation of self-CRS in the memory cell during the FORMING process.