Abstract
This paper illustrates the value of analytical techniques for the safety analysis of dependable architectures at the system level. Its important contributions are: (1) comparative analysis of five common hardware architectures for life-critical applications; (2) demonstration of the effect of various coverage parameters on system safety; and (3) illustration of important metrics in evaluating system safety. Discrete space, CTMC (continuous time Markov chains) are used to model the five architectures at the building block level: a simplex architecture; two gracefully degrading architectures with and without repair; and two hard-failing architectures.
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