Safe microcontrollers with error protection encoder-decoder using bit-inversion techniques for on-chip flash integrity verification

Abstract

The code memory integrity of embedded NOR flash memory in the microcontrollers is becoming important for applications requiring safety-critical operations like automotive ICs. Software-driven or hardware supports for the memory protection are required to guarantee the safe-conscious code execution of the downloaded firmware in microcontrollers. The protection method requires more power consumption in the ECC decoding for the code-words. In this paper, the protection hardware in the read-path of the embedded NOR flash memory in the microcontrollers chip is proposed to improve the power consumption with a small amount of logic gates overhead. The conventional error correction code (ECC) hardware data path is integrated with our newly-designed binary bit-inversion decoder with zero overhead inversion flags to decrease the power consumption in decoding the binary code blocks. The 1 bits error correction using 8 bits ECC parity code per 64 bits code blocks (72:64 SEC-DED) are applied to 64KB embedded NOR flash memory with the separated region of the flash memory for error correction padding bits.