Abstract
We have designed and successfully tested at low speed a rapid single flux quantum signed serial multiplier-accumulator with target clock frequency 20 GHz. Each bit slice of the device consists of 106 Josephson junctions and 90 resistors. It consumes 22 mA of current and occupies 0.3 mm/sup 2/. The accumulator of the developed multiplier makes two (rather than three) primitive operations per cycle without any additional overheads. This makes it fast and very robust. In particular, /spl plusmn/18% bias supply margins have been measured in a four-slice multiplier. This is our first device where superconductor microstrip lines (MSLs) have been routinely used. The MSL interfaces introduce some overhead but it is compensated by the simplicity of the design procedure.
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