ROOM TEMPERATURE SILICON QUANTUM DEVICES

Abstract

Quantum mechanical devices utilize the wave nature of electrons for their operations whenever the electron mean-free-path exceeds the appropriate dimensions of the device structure. Some of the issues such as the tunneling time, the reduction of the dielectric constant and the drastic increase in the binding energy of dopants are discussed. Lacking an appropriate barrier for silicon, the majority of quantum devices are fabricated with compound semiconductors. In the past several years, certain schemes appeared, such as the resonant tunneling via nanoscale silicon particles imbedded in an oxide matrix, and the superlattice barrier for silicon consisting of several periods of Si/O. There appears some doubt about the tunneling nature of the former, and the possiblity of dielectric breakdowns. This article aims to show that dielectric breakdowns can occur under fabrication conditions without using a controlled forming process. The latter results in epitaxially grown silicon beyond the superlattice barrier region, free of stacking fault defects, and thus is potentially important for silicon based quantum devices as well as serving as an SOI (silicon on insulator), without ion-implantation damage and oxygen inclusion. The replacement of SOI by the epitaxially grown Si/O superlattice barrier should promote the effort in high speed and low power MOSFET devices.