Room-Temperature Operation of a Lateral Tunneling Transistor Fabricated by Plane-Dependent Silicon Doping in Nonplanar Epitaxy

Abstract

Room-temperature operation of a lateral tunneling transistor fabricated by a plane-dependent Si-doping technique is demonstrated for the first time. In this technique the amphoteric nature of the Si dopant in GaAs growth by molecular beam epitaxy is utilized. Through use of this technique, a lateral p+- n+ interband tunneling junction was formed by the single growth of a heavily Si-doped GaAs layer on a GaAs(411)A patterned substrate and a quasi-planar process for device fabrication was made available. The transistor has gate-controlled negative differential resistance characteristics. By varying the gate voltage from -1.5 to 4.5 V, the peak drain current density and the peak-to-valley ratio are modulated from 161 to 251 mA/cm2 and from 3.1 to 4.4, respectively. These results indicate that this transistor successfully operates as a tunneling transistor.