Abstract
Room temperature (RT) memory operation of a single InAs quantum dot (QD) layer serving as floating gate is demonstrated. In an in-plane gated quantum-wire transistor, the charge state of the self-assembled InAs QDs is controlled by the applied gate voltage. Due to the floating-gate function of the QDs on a nearby transport channel, threshold hysteresis exceeding 200mV and storage times of several minutes are observed. The RT operation is attributed to an optimized positioning of the QDs at the site of a local minimum in the AlGaAs conduction band.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
