Abstract
To obtain a clear signal of the single electron transistor (SET) at room temperature, low capacitance of the SET is indispensable. This SET also has need of the fabrication of the tunnel junction and island with extremely small size. In this paper, three new processes will be proposed to achieve these requirements. First, we applied a single-wall carbon nanotube (SWNT) atomic force microscopy (AFM) cantilever in the AFM nano-oxidation process to obtain less than 10-nm-wide tunnel junctions and a smaller island size of the SET. Secondly, we have succeeded in developing an atomically flat quartz (SiO2) substrate with a smaller relative dielectric constant, which could reduce the SET capacitance to half that of our previous SET on the Al2O3 substrate. Finally, we established the thermal oxidation squeezing process, which can make the island smaller in size after the fabrication of the SET. The thermally squeezed SET showed a clearer Coulomb diamond characteristic than the previously fabricated SET at room temperature.
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