Abstract

Reconfigurable Field Effect Transistors (RFETs) are, typically, multi-gated Schottky barrier (SB) FETs providing both unipolar n-type and p-type conduction mechanisms and polarity switching capabilities at runtime [1]. Three-gated RFETs (Fig. 1a) can provide such properties and enable a multi-VT behaviour [2]. The device polarity is always programmed by fixing a voltage at the program gate, that overlaps the device drain side Schottky junction. The high-V T mode can be triggered when the transistor is steered at both the other Schottky junction overlapping gate and the central one. The low-V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</inf> mode is enabled when the programming is performed at both junctions and only the central gate steers the channel (Fig. 1c), From a circuit perspective, these features enable the chance to dynamically reconfigure parts of a complex netlist to perform different tasks: the potential for an innovative functional scaling paradigm of new generations of nanoelectronic devices can be then unlocked. However, laboratory scale fabricated RFETs suffer from low yields, limited adaptability, and difficult control of challenging intermediate process steps, like silicidation [3].

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