Robust design of rail-to-rail CMOS operational amplifiers for a low power supply voltage

Abstract

New bias circuits which provide currents to n- and p-channel differential pairs placed in parallel are introduced. The bias currents are a function of the input common mode voltage in such a way that the total transconductance, g/sub mT/, of the differential pairs is constant over the entire common mode range. The bias circuits, together with the differential pairs, are used to design input stages of low-voltage (/spl les/3.3 V) complementary metal-oxide-semiconductor (CMOS) operational amplifiers (op amps). The new circuits are robust in that they do not require transconductance parameter matching of n- and p-channel transistors for proper operation. A simple rail-to-rail common source output stage with class AB control is also developed and used in the design of two-stage op amps. Experimental results of MOSIS test chips containing a family of low-voltage op amps fabricated in 2 /spl mu/m p-well process are provided. The results demonstrate the effectiveness and robustness of the proposed constant transconductance input stages in achieving constant opamp unity gain frequency with very low levels of total harmonic distortion (THD) and with 3.3 V and 2.5 V power supply voltage.