Robust and fast emulation of PV panels using FSL algorithm and nonlinear power stage controller

Abstract

The effective implementation of Photovoltaic (PV) systems relies heavily on controlled testing using Photovoltaic Emulator (PVE). This paper presents a novel PVE for rapid and robust testing of PV systems. A fifteen segments linearization (FSL) methodology is put-forward to resolve the nonlinear current-voltage (I-V) equations of PV modules. The I-V curve is precisely segmented into 15 linear elements, whose coordinates are used to construct a suitable reference voltage for the PVE. To ensure a robust and fast emulation of the solar panel, a nonlinear power stage controller (NPSC) is designed to maximize the Buck converter-power stage of the PVE. Several experiments have been performed under diverse environmental and load testing profiles, revealing a mean error and maximum error of less than 0.2 %, and less than 0.6 % respectively for three classes of commercial PV modules (multicrystal KC200GT, poly-crystalline MSX-60, and mono-crystalline CS6K-280 M). The high computation accuracy of the FSL position the proposed PVE as a simple but powerful emulation tool for PV systems. By evaluating its performance and comparing it to the state-of-the-art emulators, this paper aims to demonstrate the effectiveness and superiority of the FSL-NPSC-PVE in achieving rapid and robust emulation of different commercial solar panels.