Abstract
This paper reviews CMOS based charge pump topologies used within autonomous embedded micro-systems. These charge pump structures have evolved from its simplistic diode-tied, single-branches with major threshold drops to exponential type, dual-branches with sophisticated gate and substrate control for lower voltage operation. Published charge pumps are grouped based on architecture, operation principles and pump optimization techniques with their pros and cons compared and results contrasted. The various charge pump topologies and schemes used are considered based on pumping efficiency, power efficiency, charge transferability, circuit complexity, pumping capacitors, form factor and minimum supply voltages with an optimum load. This article concludes with an overview of suitable techniques and recommendations that will aid a designer in selecting the most suitable charge pump topology especially for low ambient micro energy harvesting applications.
Highlights
Generation self-powered micro devices such as medical implants dictate the need for small, safe and renewable alternatives for battery replacement
Efforts to kick-start CMOS based power management circuits for low voltage harvesters ranges from providing an external bias (Carlson et al, 2010; Kim and Kim, 2013; Ahmed and Mukhopadhyay, 2014), mechanical MEMs switch (Ramadass and Chandrakasan, 2010), charge pump based (Chen et al, 2011; Shih and Otis, 2011; Chen et al, 2012a; Liu et al, 2012; Bender et al, 2014; Peng et al, 2014), transformer based (Im et al, 2012; Teh and Mok, 2014; Zhang et al, 2014), oscillator based (Sun and Wu, 2010; Ahmed and Mukhopadhyay, 2014; Bender et al, 2014), one time wireless charging scheme (Bandyopadhyay, 2013) to a fully electrical multi-stage start-up mechanism (Chen et al, 2012b; Weng et al, 2013; Bender et al, 2014)
This review article presents a variety of Charge Pump (CP) topologies within the field of Low Voltage (LV) energy harvesting
Summary
Generation self-powered micro devices such as medical implants dictate the need for small, safe and renewable alternatives for battery replacement. Ker et al (2006) CP (Fig. 6a) has intertwining anti-phase clock signals on two branches with source-connected NMOS bulks to eliminate body effects while Che et al (2009) design uses only PMOS for this purpose These structures with two latch-based branches eliminate VTH drops, inherent to classic CPs (Dickson, 1976; Wu and Chang, 1998) for an almost full charge transfer between stages. Rather complex scheme requiring interleaved inverters and extra stages at the end
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