Abstract
The development of 28-GHz CMOS phased-array transceivers for 5G new radio applications has been grown rapidly in recent years. This paper discusses the challenges and requirements in the design of the 28-GHz CMOS phased-array transceiver RFICs. The key architectures of analog phase shifting are examined in detail. Several RFICs of the 28-GHz CMOS phased-array transceiver are presented to give a brief overview on the state-of-the-art work.
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