Abstract

Quantum Dot Cellular Automata (QCA) and reversible logic are promising paradigms which can effectively substitute the conventional Complementary Metal Oxide Semiconductor (CMOS) based circuits in near future. Sequential circuits form indispensable part of many computational devices. It is obligatory to design low power sequential circuits so as to enhance the performance of overall system. In network communication systems flip flops and registers are widely used wherever there is a need of packet storage. QCA and reversible logic ensure the power aware and nano-size storage devices for high performance communication system. This paper focuses on the design of reversible logic based sequential circuits such as shift registers and various types of D flip flops in QCA framework. The presented circuits are designed using efficient, novel and power aware QCA layout of Fredkin gate with improved performance metrics. The proposed novel QCA layout of reversible Fredkin gate exhibits 54% better cost function and 16% lesser energy dissipation than the existing popular efficient designs. The presented QCA structure of Fredkin gate is extensively tested for associated defects and has found 66.93% fault tolerant. Considering the realistic clock distribution, the QCA layout of Fredkin gate is investigated under 2D clocking scheme. The presented gate is further utilized to realize reversible logic based sequential registers and master slave D flip flop which are unique with novel QCA architecture and not reported earlier in the literature.

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