Reverse Electrical Behavior of N-Channel and P-Channel LTPS-TFTs by N<sub>2</sub>O Plasma Surface Treatment

Abstract

In this paper, the opposite impacts of N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O plasma surface treatment on the n- and p-channel low-temperature poly-Si thin-film transistors (LTPS-TFTs) with HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> gate dielectric are investigated. Significant performance improvement of n-channel LTPS-TFT by N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O plasma surface treatment is observed, including threshold voltage reduction ΔV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> ~ -0.57 V, 1.55× higher transconductance G <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> , and 1.82× higher driving current I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">drv</sub> . However, p-channel LTPS-TFT shows serious performance degradation after N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O plasma surface treatment, including threshold voltage increase ΔV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> ~ -0.99 V, transconductance G <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> reduction, and driving current I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">drv</sub> degradation. The difference of the two mechanisms of N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O plasma surface treatment, namely, plasma induced interfacial layer (PIL) growth effect and trap passivation effect on poly-Si, is elaborated by a process of the PIL removal after the PIL growth. As a result, the trap passivation effect benefits both n- and p-channel LTPS-TFTs. The PIL growth effect shows the opposite impacts on the n- and p-channel LTPS-TFTs, that benefits n-channel LTPS-TFT and degrades p-channel LTPS-TFT seriously. Therefore, the negative impacts of N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O plasma surface treatment on the p-channel LTPS-TFTs can be eliminated by a PIL removal step in the process. These results would be critical for the applications of system-on-panel and 3-D integrated circuit.