Retention in metal–oxide–semiconductor structures with two embedded self-aligned Ge-nanocrystal layers

Abstract

Structural and electrical characterization has been carried out on metal–oxide–semiconductor (MOS) structures with a silicon dioxide (SiO2) layer containing a germanium nanocrystals (Ge-ncs) floating gate. Ge-nc layers were embedded in SiO2 by ion implantation with subsequent annealing. Structural analysis proved the presence of two self-aligned nanocrystal layers within the SiO2 host material. The electrical results indicate a strong memory effect due to the presence of a near-interface Ge-nc layer. Few volts memory windows can easily be obtained at relatively low programming voltages (<6 V). For comparison, operating voltages used in current FLASH technology are about 12 V. Despite its promising structural properties, retention times extracted from capacitance measurements and scanning Kelvin microscopy were found to be too low (∼105 s) to comply with the non-volatility industry requirements (<10 years required).