Retention Enhancement in Low Power NOR Flash Array with High-κ-Based Charge-Trapping Memory by Utilizing High Permittivity and High Bandgap of Aluminum Oxide.

Young Suh Song,Byung-Gook Park

doi:10.3390/mi12030328

Abstract

For improving retention characteristics in the NOR flash array, aluminum oxide (Al2O3, alumina) is utilized and incorporated as a tunneling layer. The proposed tunneling layers consist of SiO2/Al2O3/SiO2, which take advantage of higher permittivity and higher bandgap of Al2O3 compared to SiO2 and silicon nitride (Si3N4). By adopting the proposed tunneling layers in the NOR flash array, the threshold voltage window after 10 years from programming and erasing (P/E) was improved from 0.57 V to 4.57 V. In order to validate our proposed device structure, it is compared to another stacked-engineered structure with SiO2/Si3N4/SiO2 tunneling layers through technology computer-aided design (TCAD) simulation. In addition, to verify that our proposed structure is suitable for NOR flash array, disturbance issues are also carefully investigated. As a result, it has been demonstrated that the proposed structure can be successfully applied in NOR flash memory with significant retention improvement. Consequently, the possibility of utilizing HfO2 as a charge-trapping layer in NOR flash application is opened.

Highlights

Introduction and Rino MicheloniWith the advent of the Fifth Generation Mobile Networks (5G) era, the demand for big data has increased rapidly in recent years [1,2,3], and the need for memory devices enabling more data storage has consistently increased [4,5]
Retention characteristics are carefully calibrated with the fabricated memory devices
We have proposed the methodology for better retention characteristics and great against disturbance issues by developing the TAHOAOS

Summary

Introduction

Introduction and Rino MicheloniWith the advent of the Fifth Generation Mobile Networks (5G) era, the demand for big data has increased rapidly in recent years [1,2,3], and the need for memory devices enabling more data storage has consistently increased [4,5]. Hafnium oxide (HfO2 ) has a tremendous advantage as a charge-trapping layer (CTL) material, since its charge trap density is four times higher than that of the conventional charge-trapping layer (CTL), silicon nitride (Si3 N4 ) [9,10]. Si3 N4 , which enables significant reduction in equivalent oxide thickness (EOT) of the gate stack [13,14,15,16,17]. This enables low program voltage (V PGM ), low erase voltage (V ERS ), fast program/erase (P/E) speed, fast switching speed, and low power consumption

Objectives

Results

Conclusion