Abstract
In this paper, important parameters of the p-buried layer of a high-voltage reduced surface field p-n diode are analyzed and discussed in terms of effects on device performance, including breakdown voltage and specific turn-on resistance, Ron,sp. Guidelines for optimizing the vertical position, lateral location, and doping concentration of the p-buried layer are suggested. The experimental results demonstrate that the p-n diode with the proposed p-buried layer optimization design can improve breakdown voltage by 30.7% but only increases 2.7% in specific on-resistance Ron,sp.
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