Abstract

Photo enhanced chemical vapour deposition (PVD) of SiO 2 and Si 3 N 4 has been applied for surface passivation of specially designed n-type InP planar test resistors prepared by mesa etching on a semiinsulating InP substrate. The deposition temperatures were 150, 200 and 300 °C. The low-frequency noise (LFN) measurement technique was used for the characterisation. It was stated that the commercial PVD technology using Hg sensitization results in a low-damage passivation of InP, if a SiO 2 layer is deposited at a temperature around 300 °C. Low 1/f noise and low generation-recombination noise are generated in the test resistors passivated by this technology, and no surface conduction has been caused on the high-resistivity substrate-material holding the resistor patterns. Otherwise, for the PVD deposited Si 3 N 4 layer a significantly higher noise level has been measured, and surface conduction has also appeared.

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