Year-end Sale % OFF 
Abstract
Abstract. This paper presents the results and the limits of 1-D analytical modeling of electrostatic potential in the low-doped p type silicon body of the asymmetric n-channel DG SOI MOSFET, where the contribution to the asymmetry comes only from p- and n-type doping of polysilicon used as the gate electrodes. Solving Poisson's equation with boundary conditions based on the continuity of normal electrical displacement at interfaces and the presence of a minimum electrostatic potential by using the Matlab code we have obtained a minimum potential with a slow variation in the central zone of silicon with the value pinned around 0.46 V, where the applied VGS voltage varies from 0.45 V to 0.95 V. The paper states clearly the validity domain of the analytical solution and the important effect of the localization of the minimum electrostatic potential value on the potential variation at interfaces as a function of the applied VGS voltage.
Highlights
It is generally accepted that the dual-gate (DG) SOI MOSFET device represents a reliable solution of the scaling down of the SOI ULSI circuits to the lowest technological sizes
This paper presents the results and the limits of 1-D analytical modeling of electrostatic potential in the low-doped p type silicon body of the asymmetric n-channel DG SOI MOSFET, where the contribution to the asymmetry comes only from p- and n-type doping of polysilicon used as the gate electrodes
This paper has shown the results and limits of a 1-D analytical modelling for the electrostatic potential distribution in the very slightly doped silicon body of the asymmetric DG SOI MOSFET devices, where the asymmetry was given by the different p or n type doping of the polysilicon gate electrodes
Summary
It is generally accepted that the dual-gate (DG) SOI MOSFET device represents a reliable solution of the scaling down of the SOI ULSI circuits to the lowest technological sizes. Only a few modelling results were presented for the asymmetric devices, without description of the used procedure and a clear presentation of the validity domain. It is the purpose of our paper to present detailed results and limitations of the 1-D analytical modelling of the asymmetric DG SOI MOSFET and to show its differences compared to the symmetric case. The paper will present the background and the assumptions of the analytical modelling, followed by our detailed mathematical approach which includes the identification of the definition domain for the involved model parameters and the limitations of the calculation of the electrostatic potential as a function of the applied VGS voltage
Sign-in/Register to view highlights & summary Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
