Response time distribution of flash memory accesses

Abstract

Flash memory is becoming an increasingly important storage component among non-volatile storage devices. Its cost is decreasing dramatically and its performance continues to improve, which makes it a serious competitor for disks and a candidate for enterprise-tier storage devices of the future. Consequently, it is important to devise models and tools to analyse its behaviour and to evaluate its effects on a system’s performance. We propose a Markov modulated fluid model with priority classes to investigate the response time characteristics of Flash memory accesses. This model can represent well the Flash access operation types, respecting the erase/write/read relative priorities and autocorrelations. We apply the model to estimate response time densities at the chip for an OLTP-type of workload and indicate the magnitude of the penalty suffered by writes under priority scheduling of read operations. The model is validated against a customised hardware simulator that uses input-traces typical of our Markovian workload description.